I'm asking about general purpose CPU, so please do not suggest solutions like "single transistor is an cpu" or "single nand gate will do" etc.
#TRANSISTOR GATE COUNT FREE#
Is 250-300 transistors an realistic number then?įell free to link any CPU's with documented low transistor count (even if its based on RTL logic and not transistors per so). I researched the topic for while and I was unable to find transistor level schematics for any other CPU, but I concluded that for example mc14500 (1bit CPU) is build from around 100 NAND gates, which would translate into around 200 transistors.
#TRANSISTOR GATE COUNT FULL#
whereas the one you build by yourself will be more personal and you will have to do the math on its performance, complexity and bulkiness.What's the minimum number of transistors (more or less) needed to build simple general purpose CPU? Let's say 4 bit CPU with ~10 instructions (ADD, subtraction, MULTIPLY, move data to register, get data from register, xor, jump etc.).įor example 4004 used around 1200 transistors ( full transistor level schematics are avalible) but it supported around 46 instructions, so simpler CPU could have much less transistors. Indeed nand gates are the building block of digital electronics, because from them you can bassically design every other device, but the design normally changes and may be simplified or enlarged depending on the application, wheather it is for power, communications, data storage, etc.įinally, as you said a RAM can be build form D FF's, but once again, the main difference between building one by yourself and usign an Integrated Circuit, is that the IC has been previously designed for an application in frecuency, power, simplicity, price, etc.
Similarly with flip flops, muxes and so much other devices. The main intention of reducing this transistor count is to reduce the size of XOR gate so that. Thus I bet that the digital design of logic elements is more extensive (consider also FET's which may have different configurations). transistors that are conventionally used in most designs. Some simple rule such as "when the number of bits is < then.", "when the depth is <, then." etc.īuilding half gates from a NAND gate considering its transistor count is not always correct, from the next picture you can see that there is only one transistor and four diodes. All 14 nm nodes use FinFET (fin field-effect transistor) technology, a type of multi-gate MOSFET technology that is a non-planar evolution of planar silicon CMOS technology. In my designs I often consider small memories such as 64x8 or 128x16 and I'd really like to understand when one method is better than another. These transistors act as switches, either preventing or allowing electrical current to pass through. A chip can contain millions or billions of transistors interconnected in a certain manner. I assume that there's some overhead here. transistors and gates are designed and the use of the chip. From the above, RAM cells seem so much better but I remember a friend of mine telling me years ago, for a 256x8 RAM that "it wasn't worth it, might as well doing it with FFs". RAMs cell = 6T/bit = 1.5 gates/bit, dual port = 8T = 2 gates/bit RAMs made with D FFs => 7-10 gates/bit + suitable muxes (see above). How do I extend this to multiple input muxes ? What's the trade off with gate muxes ?įrom this discussion, muxes tend to be transmission gate.Įnabled, synchronous D FF = D FF + MUX2_1 = 6 + 4 = 10 gates, 6 + 1 (transmission gate mux) = 7 gates, 6 + gated clock = 7 gates ? Which one is more common ? Mux 2:1 with transmission gates = 4 T = 1 gate
If anyone has some more data points for MUX 4:1, 8:1, 16:1, etc Multiple input muxes can be built from MUX2_1 or with multiple input NANDs (see above) MUX 2 :1 = 4 gates or 3 NAND2 + NOT = 3.5 gates ? complete implementation flow is a physical layout of transistors, in the form of. N inputs NAND = 2*N T = N/2 gates ? Max reasonable N ? today gate count is approximated from the actual silicon area of the. Two input AND = NAND2 + NOT = 1.5 gates ? Two input NAND (NAND2) = 4 T(ransistors) = 1 gate A semi-log plot of transistor counts for microprocessors against dates of introduction, nearly doubling every two years Semiconductor device fabrication MOSFET scaling ( process nodes) 0 10 m 1971 00 6 m 1974 00 3 m 1977 1. Please feel free to correct, comment, expand. I'd like to be able to estimate gate counts of different designs for the purpose of architectural exploration.īelow is what I found out.
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